Raven Core  3.0.0
P2P Digital Currency
sph_fugue.c
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1 #include <stddef.h>
2 #include <string.h>
3 
4 #include "sph_fugue.h"
5 
6 #ifdef __cplusplus
7 extern "C"{
8 #endif
9 
10 #ifdef _MSC_VER
11 #pragma warning (disable: 4146)
12 #endif
13 
14 static const sph_u32 IV224[] = {
15  SPH_C32(0xf4c9120d), SPH_C32(0x6286f757), SPH_C32(0xee39e01c),
16  SPH_C32(0xe074e3cb), SPH_C32(0xa1127c62), SPH_C32(0x9a43d215),
17  SPH_C32(0xbd8d679a)
18 };
19 
20 static const sph_u32 IV256[] = {
21  SPH_C32(0xe952bdde), SPH_C32(0x6671135f), SPH_C32(0xe0d4f668),
22  SPH_C32(0xd2b0b594), SPH_C32(0xf96c621d), SPH_C32(0xfbf929de),
23  SPH_C32(0x9149e899), SPH_C32(0x34f8c248)
24 };
25 
26 static const sph_u32 IV384[] = {
27  SPH_C32(0xaa61ec0d), SPH_C32(0x31252e1f), SPH_C32(0xa01db4c7),
28  SPH_C32(0x00600985), SPH_C32(0x215ef44a), SPH_C32(0x741b5e9c),
29  SPH_C32(0xfa693e9a), SPH_C32(0x473eb040), SPH_C32(0xe502ae8a),
30  SPH_C32(0xa99c25e0), SPH_C32(0xbc95517c), SPH_C32(0x5c1095a1)
31 };
32 
33 static const sph_u32 IV512[] = {
34  SPH_C32(0x8807a57e), SPH_C32(0xe616af75), SPH_C32(0xc5d3e4db),
35  SPH_C32(0xac9ab027), SPH_C32(0xd915f117), SPH_C32(0xb6eecc54),
36  SPH_C32(0x06e8020b), SPH_C32(0x4a92efd1), SPH_C32(0xaac6e2c9),
37  SPH_C32(0xddb21398), SPH_C32(0xcae65838), SPH_C32(0x437f203f),
38  SPH_C32(0x25ea78e7), SPH_C32(0x951fddd6), SPH_C32(0xda6ed11d),
39  SPH_C32(0xe13e3567)
40 };
41 
42 static const sph_u32 mixtab0[] = {
43  SPH_C32(0x63633297), SPH_C32(0x7c7c6feb), SPH_C32(0x77775ec7),
44  SPH_C32(0x7b7b7af7), SPH_C32(0xf2f2e8e5), SPH_C32(0x6b6b0ab7),
45  SPH_C32(0x6f6f16a7), SPH_C32(0xc5c56d39), SPH_C32(0x303090c0),
46  SPH_C32(0x01010704), SPH_C32(0x67672e87), SPH_C32(0x2b2bd1ac),
47  SPH_C32(0xfefeccd5), SPH_C32(0xd7d71371), SPH_C32(0xabab7c9a),
48  SPH_C32(0x767659c3), SPH_C32(0xcaca4005), SPH_C32(0x8282a33e),
49  SPH_C32(0xc9c94909), SPH_C32(0x7d7d68ef), SPH_C32(0xfafad0c5),
50  SPH_C32(0x5959947f), SPH_C32(0x4747ce07), SPH_C32(0xf0f0e6ed),
51  SPH_C32(0xadad6e82), SPH_C32(0xd4d41a7d), SPH_C32(0xa2a243be),
52  SPH_C32(0xafaf608a), SPH_C32(0x9c9cf946), SPH_C32(0xa4a451a6),
53  SPH_C32(0x727245d3), SPH_C32(0xc0c0762d), SPH_C32(0xb7b728ea),
54  SPH_C32(0xfdfdc5d9), SPH_C32(0x9393d47a), SPH_C32(0x2626f298),
55  SPH_C32(0x363682d8), SPH_C32(0x3f3fbdfc), SPH_C32(0xf7f7f3f1),
56  SPH_C32(0xcccc521d), SPH_C32(0x34348cd0), SPH_C32(0xa5a556a2),
57  SPH_C32(0xe5e58db9), SPH_C32(0xf1f1e1e9), SPH_C32(0x71714cdf),
58  SPH_C32(0xd8d83e4d), SPH_C32(0x313197c4), SPH_C32(0x15156b54),
59  SPH_C32(0x04041c10), SPH_C32(0xc7c76331), SPH_C32(0x2323e98c),
60  SPH_C32(0xc3c37f21), SPH_C32(0x18184860), SPH_C32(0x9696cf6e),
61  SPH_C32(0x05051b14), SPH_C32(0x9a9aeb5e), SPH_C32(0x0707151c),
62  SPH_C32(0x12127e48), SPH_C32(0x8080ad36), SPH_C32(0xe2e298a5),
63  SPH_C32(0xebeba781), SPH_C32(0x2727f59c), SPH_C32(0xb2b233fe),
64  SPH_C32(0x757550cf), SPH_C32(0x09093f24), SPH_C32(0x8383a43a),
65  SPH_C32(0x2c2cc4b0), SPH_C32(0x1a1a4668), SPH_C32(0x1b1b416c),
66  SPH_C32(0x6e6e11a3), SPH_C32(0x5a5a9d73), SPH_C32(0xa0a04db6),
67  SPH_C32(0x5252a553), SPH_C32(0x3b3ba1ec), SPH_C32(0xd6d61475),
68  SPH_C32(0xb3b334fa), SPH_C32(0x2929dfa4), SPH_C32(0xe3e39fa1),
69  SPH_C32(0x2f2fcdbc), SPH_C32(0x8484b126), SPH_C32(0x5353a257),
70  SPH_C32(0xd1d10169), SPH_C32(0x00000000), SPH_C32(0xededb599),
71  SPH_C32(0x2020e080), SPH_C32(0xfcfcc2dd), SPH_C32(0xb1b13af2),
72  SPH_C32(0x5b5b9a77), SPH_C32(0x6a6a0db3), SPH_C32(0xcbcb4701),
73  SPH_C32(0xbebe17ce), SPH_C32(0x3939afe4), SPH_C32(0x4a4aed33),
74  SPH_C32(0x4c4cff2b), SPH_C32(0x5858937b), SPH_C32(0xcfcf5b11),
75  SPH_C32(0xd0d0066d), SPH_C32(0xefefbb91), SPH_C32(0xaaaa7b9e),
76  SPH_C32(0xfbfbd7c1), SPH_C32(0x4343d217), SPH_C32(0x4d4df82f),
77  SPH_C32(0x333399cc), SPH_C32(0x8585b622), SPH_C32(0x4545c00f),
78  SPH_C32(0xf9f9d9c9), SPH_C32(0x02020e08), SPH_C32(0x7f7f66e7),
79  SPH_C32(0x5050ab5b), SPH_C32(0x3c3cb4f0), SPH_C32(0x9f9ff04a),
80  SPH_C32(0xa8a87596), SPH_C32(0x5151ac5f), SPH_C32(0xa3a344ba),
81  SPH_C32(0x4040db1b), SPH_C32(0x8f8f800a), SPH_C32(0x9292d37e),
82  SPH_C32(0x9d9dfe42), SPH_C32(0x3838a8e0), SPH_C32(0xf5f5fdf9),
83  SPH_C32(0xbcbc19c6), SPH_C32(0xb6b62fee), SPH_C32(0xdada3045),
84  SPH_C32(0x2121e784), SPH_C32(0x10107040), SPH_C32(0xffffcbd1),
85  SPH_C32(0xf3f3efe1), SPH_C32(0xd2d20865), SPH_C32(0xcdcd5519),
86  SPH_C32(0x0c0c2430), SPH_C32(0x1313794c), SPH_C32(0xececb29d),
87  SPH_C32(0x5f5f8667), SPH_C32(0x9797c86a), SPH_C32(0x4444c70b),
88  SPH_C32(0x1717655c), SPH_C32(0xc4c46a3d), SPH_C32(0xa7a758aa),
89  SPH_C32(0x7e7e61e3), SPH_C32(0x3d3db3f4), SPH_C32(0x6464278b),
90  SPH_C32(0x5d5d886f), SPH_C32(0x19194f64), SPH_C32(0x737342d7),
91  SPH_C32(0x60603b9b), SPH_C32(0x8181aa32), SPH_C32(0x4f4ff627),
92  SPH_C32(0xdcdc225d), SPH_C32(0x2222ee88), SPH_C32(0x2a2ad6a8),
93  SPH_C32(0x9090dd76), SPH_C32(0x88889516), SPH_C32(0x4646c903),
94  SPH_C32(0xeeeebc95), SPH_C32(0xb8b805d6), SPH_C32(0x14146c50),
95  SPH_C32(0xdede2c55), SPH_C32(0x5e5e8163), SPH_C32(0x0b0b312c),
96  SPH_C32(0xdbdb3741), SPH_C32(0xe0e096ad), SPH_C32(0x32329ec8),
97  SPH_C32(0x3a3aa6e8), SPH_C32(0x0a0a3628), SPH_C32(0x4949e43f),
98  SPH_C32(0x06061218), SPH_C32(0x2424fc90), SPH_C32(0x5c5c8f6b),
99  SPH_C32(0xc2c27825), SPH_C32(0xd3d30f61), SPH_C32(0xacac6986),
100  SPH_C32(0x62623593), SPH_C32(0x9191da72), SPH_C32(0x9595c662),
101  SPH_C32(0xe4e48abd), SPH_C32(0x797974ff), SPH_C32(0xe7e783b1),
102  SPH_C32(0xc8c84e0d), SPH_C32(0x373785dc), SPH_C32(0x6d6d18af),
103  SPH_C32(0x8d8d8e02), SPH_C32(0xd5d51d79), SPH_C32(0x4e4ef123),
104  SPH_C32(0xa9a97292), SPH_C32(0x6c6c1fab), SPH_C32(0x5656b943),
105  SPH_C32(0xf4f4fafd), SPH_C32(0xeaeaa085), SPH_C32(0x6565208f),
106  SPH_C32(0x7a7a7df3), SPH_C32(0xaeae678e), SPH_C32(0x08083820),
107  SPH_C32(0xbaba0bde), SPH_C32(0x787873fb), SPH_C32(0x2525fb94),
108  SPH_C32(0x2e2ecab8), SPH_C32(0x1c1c5470), SPH_C32(0xa6a65fae),
109  SPH_C32(0xb4b421e6), SPH_C32(0xc6c66435), SPH_C32(0xe8e8ae8d),
110  SPH_C32(0xdddd2559), SPH_C32(0x747457cb), SPH_C32(0x1f1f5d7c),
111  SPH_C32(0x4b4bea37), SPH_C32(0xbdbd1ec2), SPH_C32(0x8b8b9c1a),
112  SPH_C32(0x8a8a9b1e), SPH_C32(0x70704bdb), SPH_C32(0x3e3ebaf8),
113  SPH_C32(0xb5b526e2), SPH_C32(0x66662983), SPH_C32(0x4848e33b),
114  SPH_C32(0x0303090c), SPH_C32(0xf6f6f4f5), SPH_C32(0x0e0e2a38),
115  SPH_C32(0x61613c9f), SPH_C32(0x35358bd4), SPH_C32(0x5757be47),
116  SPH_C32(0xb9b902d2), SPH_C32(0x8686bf2e), SPH_C32(0xc1c17129),
117  SPH_C32(0x1d1d5374), SPH_C32(0x9e9ef74e), SPH_C32(0xe1e191a9),
118  SPH_C32(0xf8f8decd), SPH_C32(0x9898e556), SPH_C32(0x11117744),
119  SPH_C32(0x696904bf), SPH_C32(0xd9d93949), SPH_C32(0x8e8e870e),
120  SPH_C32(0x9494c166), SPH_C32(0x9b9bec5a), SPH_C32(0x1e1e5a78),
121  SPH_C32(0x8787b82a), SPH_C32(0xe9e9a989), SPH_C32(0xcece5c15),
122  SPH_C32(0x5555b04f), SPH_C32(0x2828d8a0), SPH_C32(0xdfdf2b51),
123  SPH_C32(0x8c8c8906), SPH_C32(0xa1a14ab2), SPH_C32(0x89899212),
124  SPH_C32(0x0d0d2334), SPH_C32(0xbfbf10ca), SPH_C32(0xe6e684b5),
125  SPH_C32(0x4242d513), SPH_C32(0x686803bb), SPH_C32(0x4141dc1f),
126  SPH_C32(0x9999e252), SPH_C32(0x2d2dc3b4), SPH_C32(0x0f0f2d3c),
127  SPH_C32(0xb0b03df6), SPH_C32(0x5454b74b), SPH_C32(0xbbbb0cda),
128  SPH_C32(0x16166258)
129 };
130 
131 static const sph_u32 mixtab1[] = {
132  SPH_C32(0x97636332), SPH_C32(0xeb7c7c6f), SPH_C32(0xc777775e),
133  SPH_C32(0xf77b7b7a), SPH_C32(0xe5f2f2e8), SPH_C32(0xb76b6b0a),
134  SPH_C32(0xa76f6f16), SPH_C32(0x39c5c56d), SPH_C32(0xc0303090),
135  SPH_C32(0x04010107), SPH_C32(0x8767672e), SPH_C32(0xac2b2bd1),
136  SPH_C32(0xd5fefecc), SPH_C32(0x71d7d713), SPH_C32(0x9aabab7c),
137  SPH_C32(0xc3767659), SPH_C32(0x05caca40), SPH_C32(0x3e8282a3),
138  SPH_C32(0x09c9c949), SPH_C32(0xef7d7d68), SPH_C32(0xc5fafad0),
139  SPH_C32(0x7f595994), SPH_C32(0x074747ce), SPH_C32(0xedf0f0e6),
140  SPH_C32(0x82adad6e), SPH_C32(0x7dd4d41a), SPH_C32(0xbea2a243),
141  SPH_C32(0x8aafaf60), SPH_C32(0x469c9cf9), SPH_C32(0xa6a4a451),
142  SPH_C32(0xd3727245), SPH_C32(0x2dc0c076), SPH_C32(0xeab7b728),
143  SPH_C32(0xd9fdfdc5), SPH_C32(0x7a9393d4), SPH_C32(0x982626f2),
144  SPH_C32(0xd8363682), SPH_C32(0xfc3f3fbd), SPH_C32(0xf1f7f7f3),
145  SPH_C32(0x1dcccc52), SPH_C32(0xd034348c), SPH_C32(0xa2a5a556),
146  SPH_C32(0xb9e5e58d), SPH_C32(0xe9f1f1e1), SPH_C32(0xdf71714c),
147  SPH_C32(0x4dd8d83e), SPH_C32(0xc4313197), SPH_C32(0x5415156b),
148  SPH_C32(0x1004041c), SPH_C32(0x31c7c763), SPH_C32(0x8c2323e9),
149  SPH_C32(0x21c3c37f), SPH_C32(0x60181848), SPH_C32(0x6e9696cf),
150  SPH_C32(0x1405051b), SPH_C32(0x5e9a9aeb), SPH_C32(0x1c070715),
151  SPH_C32(0x4812127e), SPH_C32(0x368080ad), SPH_C32(0xa5e2e298),
152  SPH_C32(0x81ebeba7), SPH_C32(0x9c2727f5), SPH_C32(0xfeb2b233),
153  SPH_C32(0xcf757550), SPH_C32(0x2409093f), SPH_C32(0x3a8383a4),
154  SPH_C32(0xb02c2cc4), SPH_C32(0x681a1a46), SPH_C32(0x6c1b1b41),
155  SPH_C32(0xa36e6e11), SPH_C32(0x735a5a9d), SPH_C32(0xb6a0a04d),
156  SPH_C32(0x535252a5), SPH_C32(0xec3b3ba1), SPH_C32(0x75d6d614),
157  SPH_C32(0xfab3b334), SPH_C32(0xa42929df), SPH_C32(0xa1e3e39f),
158  SPH_C32(0xbc2f2fcd), SPH_C32(0x268484b1), SPH_C32(0x575353a2),
159  SPH_C32(0x69d1d101), SPH_C32(0x00000000), SPH_C32(0x99ededb5),
160  SPH_C32(0x802020e0), SPH_C32(0xddfcfcc2), SPH_C32(0xf2b1b13a),
161  SPH_C32(0x775b5b9a), SPH_C32(0xb36a6a0d), SPH_C32(0x01cbcb47),
162  SPH_C32(0xcebebe17), SPH_C32(0xe43939af), SPH_C32(0x334a4aed),
163  SPH_C32(0x2b4c4cff), SPH_C32(0x7b585893), SPH_C32(0x11cfcf5b),
164  SPH_C32(0x6dd0d006), SPH_C32(0x91efefbb), SPH_C32(0x9eaaaa7b),
165  SPH_C32(0xc1fbfbd7), SPH_C32(0x174343d2), SPH_C32(0x2f4d4df8),
166  SPH_C32(0xcc333399), SPH_C32(0x228585b6), SPH_C32(0x0f4545c0),
167  SPH_C32(0xc9f9f9d9), SPH_C32(0x0802020e), SPH_C32(0xe77f7f66),
168  SPH_C32(0x5b5050ab), SPH_C32(0xf03c3cb4), SPH_C32(0x4a9f9ff0),
169  SPH_C32(0x96a8a875), SPH_C32(0x5f5151ac), SPH_C32(0xbaa3a344),
170  SPH_C32(0x1b4040db), SPH_C32(0x0a8f8f80), SPH_C32(0x7e9292d3),
171  SPH_C32(0x429d9dfe), SPH_C32(0xe03838a8), SPH_C32(0xf9f5f5fd),
172  SPH_C32(0xc6bcbc19), SPH_C32(0xeeb6b62f), SPH_C32(0x45dada30),
173  SPH_C32(0x842121e7), SPH_C32(0x40101070), SPH_C32(0xd1ffffcb),
174  SPH_C32(0xe1f3f3ef), SPH_C32(0x65d2d208), SPH_C32(0x19cdcd55),
175  SPH_C32(0x300c0c24), SPH_C32(0x4c131379), SPH_C32(0x9dececb2),
176  SPH_C32(0x675f5f86), SPH_C32(0x6a9797c8), SPH_C32(0x0b4444c7),
177  SPH_C32(0x5c171765), SPH_C32(0x3dc4c46a), SPH_C32(0xaaa7a758),
178  SPH_C32(0xe37e7e61), SPH_C32(0xf43d3db3), SPH_C32(0x8b646427),
179  SPH_C32(0x6f5d5d88), SPH_C32(0x6419194f), SPH_C32(0xd7737342),
180  SPH_C32(0x9b60603b), SPH_C32(0x328181aa), SPH_C32(0x274f4ff6),
181  SPH_C32(0x5ddcdc22), SPH_C32(0x882222ee), SPH_C32(0xa82a2ad6),
182  SPH_C32(0x769090dd), SPH_C32(0x16888895), SPH_C32(0x034646c9),
183  SPH_C32(0x95eeeebc), SPH_C32(0xd6b8b805), SPH_C32(0x5014146c),
184  SPH_C32(0x55dede2c), SPH_C32(0x635e5e81), SPH_C32(0x2c0b0b31),
185  SPH_C32(0x41dbdb37), SPH_C32(0xade0e096), SPH_C32(0xc832329e),
186  SPH_C32(0xe83a3aa6), SPH_C32(0x280a0a36), SPH_C32(0x3f4949e4),
187  SPH_C32(0x18060612), SPH_C32(0x902424fc), SPH_C32(0x6b5c5c8f),
188  SPH_C32(0x25c2c278), SPH_C32(0x61d3d30f), SPH_C32(0x86acac69),
189  SPH_C32(0x93626235), SPH_C32(0x729191da), SPH_C32(0x629595c6),
190  SPH_C32(0xbde4e48a), SPH_C32(0xff797974), SPH_C32(0xb1e7e783),
191  SPH_C32(0x0dc8c84e), SPH_C32(0xdc373785), SPH_C32(0xaf6d6d18),
192  SPH_C32(0x028d8d8e), SPH_C32(0x79d5d51d), SPH_C32(0x234e4ef1),
193  SPH_C32(0x92a9a972), SPH_C32(0xab6c6c1f), SPH_C32(0x435656b9),
194  SPH_C32(0xfdf4f4fa), SPH_C32(0x85eaeaa0), SPH_C32(0x8f656520),
195  SPH_C32(0xf37a7a7d), SPH_C32(0x8eaeae67), SPH_C32(0x20080838),
196  SPH_C32(0xdebaba0b), SPH_C32(0xfb787873), SPH_C32(0x942525fb),
197  SPH_C32(0xb82e2eca), SPH_C32(0x701c1c54), SPH_C32(0xaea6a65f),
198  SPH_C32(0xe6b4b421), SPH_C32(0x35c6c664), SPH_C32(0x8de8e8ae),
199  SPH_C32(0x59dddd25), SPH_C32(0xcb747457), SPH_C32(0x7c1f1f5d),
200  SPH_C32(0x374b4bea), SPH_C32(0xc2bdbd1e), SPH_C32(0x1a8b8b9c),
201  SPH_C32(0x1e8a8a9b), SPH_C32(0xdb70704b), SPH_C32(0xf83e3eba),
202  SPH_C32(0xe2b5b526), SPH_C32(0x83666629), SPH_C32(0x3b4848e3),
203  SPH_C32(0x0c030309), SPH_C32(0xf5f6f6f4), SPH_C32(0x380e0e2a),
204  SPH_C32(0x9f61613c), SPH_C32(0xd435358b), SPH_C32(0x475757be),
205  SPH_C32(0xd2b9b902), SPH_C32(0x2e8686bf), SPH_C32(0x29c1c171),
206  SPH_C32(0x741d1d53), SPH_C32(0x4e9e9ef7), SPH_C32(0xa9e1e191),
207  SPH_C32(0xcdf8f8de), SPH_C32(0x569898e5), SPH_C32(0x44111177),
208  SPH_C32(0xbf696904), SPH_C32(0x49d9d939), SPH_C32(0x0e8e8e87),
209  SPH_C32(0x669494c1), SPH_C32(0x5a9b9bec), SPH_C32(0x781e1e5a),
210  SPH_C32(0x2a8787b8), SPH_C32(0x89e9e9a9), SPH_C32(0x15cece5c),
211  SPH_C32(0x4f5555b0), SPH_C32(0xa02828d8), SPH_C32(0x51dfdf2b),
212  SPH_C32(0x068c8c89), SPH_C32(0xb2a1a14a), SPH_C32(0x12898992),
213  SPH_C32(0x340d0d23), SPH_C32(0xcabfbf10), SPH_C32(0xb5e6e684),
214  SPH_C32(0x134242d5), SPH_C32(0xbb686803), SPH_C32(0x1f4141dc),
215  SPH_C32(0x529999e2), SPH_C32(0xb42d2dc3), SPH_C32(0x3c0f0f2d),
216  SPH_C32(0xf6b0b03d), SPH_C32(0x4b5454b7), SPH_C32(0xdabbbb0c),
217  SPH_C32(0x58161662)
218 };
219 
220 static const sph_u32 mixtab2[] = {
221  SPH_C32(0x32976363), SPH_C32(0x6feb7c7c), SPH_C32(0x5ec77777),
222  SPH_C32(0x7af77b7b), SPH_C32(0xe8e5f2f2), SPH_C32(0x0ab76b6b),
223  SPH_C32(0x16a76f6f), SPH_C32(0x6d39c5c5), SPH_C32(0x90c03030),
224  SPH_C32(0x07040101), SPH_C32(0x2e876767), SPH_C32(0xd1ac2b2b),
225  SPH_C32(0xccd5fefe), SPH_C32(0x1371d7d7), SPH_C32(0x7c9aabab),
226  SPH_C32(0x59c37676), SPH_C32(0x4005caca), SPH_C32(0xa33e8282),
227  SPH_C32(0x4909c9c9), SPH_C32(0x68ef7d7d), SPH_C32(0xd0c5fafa),
228  SPH_C32(0x947f5959), SPH_C32(0xce074747), SPH_C32(0xe6edf0f0),
229  SPH_C32(0x6e82adad), SPH_C32(0x1a7dd4d4), SPH_C32(0x43bea2a2),
230  SPH_C32(0x608aafaf), SPH_C32(0xf9469c9c), SPH_C32(0x51a6a4a4),
231  SPH_C32(0x45d37272), SPH_C32(0x762dc0c0), SPH_C32(0x28eab7b7),
232  SPH_C32(0xc5d9fdfd), SPH_C32(0xd47a9393), SPH_C32(0xf2982626),
233  SPH_C32(0x82d83636), SPH_C32(0xbdfc3f3f), SPH_C32(0xf3f1f7f7),
234  SPH_C32(0x521dcccc), SPH_C32(0x8cd03434), SPH_C32(0x56a2a5a5),
235  SPH_C32(0x8db9e5e5), SPH_C32(0xe1e9f1f1), SPH_C32(0x4cdf7171),
236  SPH_C32(0x3e4dd8d8), SPH_C32(0x97c43131), SPH_C32(0x6b541515),
237  SPH_C32(0x1c100404), SPH_C32(0x6331c7c7), SPH_C32(0xe98c2323),
238  SPH_C32(0x7f21c3c3), SPH_C32(0x48601818), SPH_C32(0xcf6e9696),
239  SPH_C32(0x1b140505), SPH_C32(0xeb5e9a9a), SPH_C32(0x151c0707),
240  SPH_C32(0x7e481212), SPH_C32(0xad368080), SPH_C32(0x98a5e2e2),
241  SPH_C32(0xa781ebeb), SPH_C32(0xf59c2727), SPH_C32(0x33feb2b2),
242  SPH_C32(0x50cf7575), SPH_C32(0x3f240909), SPH_C32(0xa43a8383),
243  SPH_C32(0xc4b02c2c), SPH_C32(0x46681a1a), SPH_C32(0x416c1b1b),
244  SPH_C32(0x11a36e6e), SPH_C32(0x9d735a5a), SPH_C32(0x4db6a0a0),
245  SPH_C32(0xa5535252), SPH_C32(0xa1ec3b3b), SPH_C32(0x1475d6d6),
246  SPH_C32(0x34fab3b3), SPH_C32(0xdfa42929), SPH_C32(0x9fa1e3e3),
247  SPH_C32(0xcdbc2f2f), SPH_C32(0xb1268484), SPH_C32(0xa2575353),
248  SPH_C32(0x0169d1d1), SPH_C32(0x00000000), SPH_C32(0xb599eded),
249  SPH_C32(0xe0802020), SPH_C32(0xc2ddfcfc), SPH_C32(0x3af2b1b1),
250  SPH_C32(0x9a775b5b), SPH_C32(0x0db36a6a), SPH_C32(0x4701cbcb),
251  SPH_C32(0x17cebebe), SPH_C32(0xafe43939), SPH_C32(0xed334a4a),
252  SPH_C32(0xff2b4c4c), SPH_C32(0x937b5858), SPH_C32(0x5b11cfcf),
253  SPH_C32(0x066dd0d0), SPH_C32(0xbb91efef), SPH_C32(0x7b9eaaaa),
254  SPH_C32(0xd7c1fbfb), SPH_C32(0xd2174343), SPH_C32(0xf82f4d4d),
255  SPH_C32(0x99cc3333), SPH_C32(0xb6228585), SPH_C32(0xc00f4545),
256  SPH_C32(0xd9c9f9f9), SPH_C32(0x0e080202), SPH_C32(0x66e77f7f),
257  SPH_C32(0xab5b5050), SPH_C32(0xb4f03c3c), SPH_C32(0xf04a9f9f),
258  SPH_C32(0x7596a8a8), SPH_C32(0xac5f5151), SPH_C32(0x44baa3a3),
259  SPH_C32(0xdb1b4040), SPH_C32(0x800a8f8f), SPH_C32(0xd37e9292),
260  SPH_C32(0xfe429d9d), SPH_C32(0xa8e03838), SPH_C32(0xfdf9f5f5),
261  SPH_C32(0x19c6bcbc), SPH_C32(0x2feeb6b6), SPH_C32(0x3045dada),
262  SPH_C32(0xe7842121), SPH_C32(0x70401010), SPH_C32(0xcbd1ffff),
263  SPH_C32(0xefe1f3f3), SPH_C32(0x0865d2d2), SPH_C32(0x5519cdcd),
264  SPH_C32(0x24300c0c), SPH_C32(0x794c1313), SPH_C32(0xb29decec),
265  SPH_C32(0x86675f5f), SPH_C32(0xc86a9797), SPH_C32(0xc70b4444),
266  SPH_C32(0x655c1717), SPH_C32(0x6a3dc4c4), SPH_C32(0x58aaa7a7),
267  SPH_C32(0x61e37e7e), SPH_C32(0xb3f43d3d), SPH_C32(0x278b6464),
268  SPH_C32(0x886f5d5d), SPH_C32(0x4f641919), SPH_C32(0x42d77373),
269  SPH_C32(0x3b9b6060), SPH_C32(0xaa328181), SPH_C32(0xf6274f4f),
270  SPH_C32(0x225ddcdc), SPH_C32(0xee882222), SPH_C32(0xd6a82a2a),
271  SPH_C32(0xdd769090), SPH_C32(0x95168888), SPH_C32(0xc9034646),
272  SPH_C32(0xbc95eeee), SPH_C32(0x05d6b8b8), SPH_C32(0x6c501414),
273  SPH_C32(0x2c55dede), SPH_C32(0x81635e5e), SPH_C32(0x312c0b0b),
274  SPH_C32(0x3741dbdb), SPH_C32(0x96ade0e0), SPH_C32(0x9ec83232),
275  SPH_C32(0xa6e83a3a), SPH_C32(0x36280a0a), SPH_C32(0xe43f4949),
276  SPH_C32(0x12180606), SPH_C32(0xfc902424), SPH_C32(0x8f6b5c5c),
277  SPH_C32(0x7825c2c2), SPH_C32(0x0f61d3d3), SPH_C32(0x6986acac),
278  SPH_C32(0x35936262), SPH_C32(0xda729191), SPH_C32(0xc6629595),
279  SPH_C32(0x8abde4e4), SPH_C32(0x74ff7979), SPH_C32(0x83b1e7e7),
280  SPH_C32(0x4e0dc8c8), SPH_C32(0x85dc3737), SPH_C32(0x18af6d6d),
281  SPH_C32(0x8e028d8d), SPH_C32(0x1d79d5d5), SPH_C32(0xf1234e4e),
282  SPH_C32(0x7292a9a9), SPH_C32(0x1fab6c6c), SPH_C32(0xb9435656),
283  SPH_C32(0xfafdf4f4), SPH_C32(0xa085eaea), SPH_C32(0x208f6565),
284  SPH_C32(0x7df37a7a), SPH_C32(0x678eaeae), SPH_C32(0x38200808),
285  SPH_C32(0x0bdebaba), SPH_C32(0x73fb7878), SPH_C32(0xfb942525),
286  SPH_C32(0xcab82e2e), SPH_C32(0x54701c1c), SPH_C32(0x5faea6a6),
287  SPH_C32(0x21e6b4b4), SPH_C32(0x6435c6c6), SPH_C32(0xae8de8e8),
288  SPH_C32(0x2559dddd), SPH_C32(0x57cb7474), SPH_C32(0x5d7c1f1f),
289  SPH_C32(0xea374b4b), SPH_C32(0x1ec2bdbd), SPH_C32(0x9c1a8b8b),
290  SPH_C32(0x9b1e8a8a), SPH_C32(0x4bdb7070), SPH_C32(0xbaf83e3e),
291  SPH_C32(0x26e2b5b5), SPH_C32(0x29836666), SPH_C32(0xe33b4848),
292  SPH_C32(0x090c0303), SPH_C32(0xf4f5f6f6), SPH_C32(0x2a380e0e),
293  SPH_C32(0x3c9f6161), SPH_C32(0x8bd43535), SPH_C32(0xbe475757),
294  SPH_C32(0x02d2b9b9), SPH_C32(0xbf2e8686), SPH_C32(0x7129c1c1),
295  SPH_C32(0x53741d1d), SPH_C32(0xf74e9e9e), SPH_C32(0x91a9e1e1),
296  SPH_C32(0xdecdf8f8), SPH_C32(0xe5569898), SPH_C32(0x77441111),
297  SPH_C32(0x04bf6969), SPH_C32(0x3949d9d9), SPH_C32(0x870e8e8e),
298  SPH_C32(0xc1669494), SPH_C32(0xec5a9b9b), SPH_C32(0x5a781e1e),
299  SPH_C32(0xb82a8787), SPH_C32(0xa989e9e9), SPH_C32(0x5c15cece),
300  SPH_C32(0xb04f5555), SPH_C32(0xd8a02828), SPH_C32(0x2b51dfdf),
301  SPH_C32(0x89068c8c), SPH_C32(0x4ab2a1a1), SPH_C32(0x92128989),
302  SPH_C32(0x23340d0d), SPH_C32(0x10cabfbf), SPH_C32(0x84b5e6e6),
303  SPH_C32(0xd5134242), SPH_C32(0x03bb6868), SPH_C32(0xdc1f4141),
304  SPH_C32(0xe2529999), SPH_C32(0xc3b42d2d), SPH_C32(0x2d3c0f0f),
305  SPH_C32(0x3df6b0b0), SPH_C32(0xb74b5454), SPH_C32(0x0cdabbbb),
306  SPH_C32(0x62581616)
307 };
308 
309 static const sph_u32 mixtab3[] = {
310  SPH_C32(0x63329763), SPH_C32(0x7c6feb7c), SPH_C32(0x775ec777),
311  SPH_C32(0x7b7af77b), SPH_C32(0xf2e8e5f2), SPH_C32(0x6b0ab76b),
312  SPH_C32(0x6f16a76f), SPH_C32(0xc56d39c5), SPH_C32(0x3090c030),
313  SPH_C32(0x01070401), SPH_C32(0x672e8767), SPH_C32(0x2bd1ac2b),
314  SPH_C32(0xfeccd5fe), SPH_C32(0xd71371d7), SPH_C32(0xab7c9aab),
315  SPH_C32(0x7659c376), SPH_C32(0xca4005ca), SPH_C32(0x82a33e82),
316  SPH_C32(0xc94909c9), SPH_C32(0x7d68ef7d), SPH_C32(0xfad0c5fa),
317  SPH_C32(0x59947f59), SPH_C32(0x47ce0747), SPH_C32(0xf0e6edf0),
318  SPH_C32(0xad6e82ad), SPH_C32(0xd41a7dd4), SPH_C32(0xa243bea2),
319  SPH_C32(0xaf608aaf), SPH_C32(0x9cf9469c), SPH_C32(0xa451a6a4),
320  SPH_C32(0x7245d372), SPH_C32(0xc0762dc0), SPH_C32(0xb728eab7),
321  SPH_C32(0xfdc5d9fd), SPH_C32(0x93d47a93), SPH_C32(0x26f29826),
322  SPH_C32(0x3682d836), SPH_C32(0x3fbdfc3f), SPH_C32(0xf7f3f1f7),
323  SPH_C32(0xcc521dcc), SPH_C32(0x348cd034), SPH_C32(0xa556a2a5),
324  SPH_C32(0xe58db9e5), SPH_C32(0xf1e1e9f1), SPH_C32(0x714cdf71),
325  SPH_C32(0xd83e4dd8), SPH_C32(0x3197c431), SPH_C32(0x156b5415),
326  SPH_C32(0x041c1004), SPH_C32(0xc76331c7), SPH_C32(0x23e98c23),
327  SPH_C32(0xc37f21c3), SPH_C32(0x18486018), SPH_C32(0x96cf6e96),
328  SPH_C32(0x051b1405), SPH_C32(0x9aeb5e9a), SPH_C32(0x07151c07),
329  SPH_C32(0x127e4812), SPH_C32(0x80ad3680), SPH_C32(0xe298a5e2),
330  SPH_C32(0xeba781eb), SPH_C32(0x27f59c27), SPH_C32(0xb233feb2),
331  SPH_C32(0x7550cf75), SPH_C32(0x093f2409), SPH_C32(0x83a43a83),
332  SPH_C32(0x2cc4b02c), SPH_C32(0x1a46681a), SPH_C32(0x1b416c1b),
333  SPH_C32(0x6e11a36e), SPH_C32(0x5a9d735a), SPH_C32(0xa04db6a0),
334  SPH_C32(0x52a55352), SPH_C32(0x3ba1ec3b), SPH_C32(0xd61475d6),
335  SPH_C32(0xb334fab3), SPH_C32(0x29dfa429), SPH_C32(0xe39fa1e3),
336  SPH_C32(0x2fcdbc2f), SPH_C32(0x84b12684), SPH_C32(0x53a25753),
337  SPH_C32(0xd10169d1), SPH_C32(0x00000000), SPH_C32(0xedb599ed),
338  SPH_C32(0x20e08020), SPH_C32(0xfcc2ddfc), SPH_C32(0xb13af2b1),
339  SPH_C32(0x5b9a775b), SPH_C32(0x6a0db36a), SPH_C32(0xcb4701cb),
340  SPH_C32(0xbe17cebe), SPH_C32(0x39afe439), SPH_C32(0x4aed334a),
341  SPH_C32(0x4cff2b4c), SPH_C32(0x58937b58), SPH_C32(0xcf5b11cf),
342  SPH_C32(0xd0066dd0), SPH_C32(0xefbb91ef), SPH_C32(0xaa7b9eaa),
343  SPH_C32(0xfbd7c1fb), SPH_C32(0x43d21743), SPH_C32(0x4df82f4d),
344  SPH_C32(0x3399cc33), SPH_C32(0x85b62285), SPH_C32(0x45c00f45),
345  SPH_C32(0xf9d9c9f9), SPH_C32(0x020e0802), SPH_C32(0x7f66e77f),
346  SPH_C32(0x50ab5b50), SPH_C32(0x3cb4f03c), SPH_C32(0x9ff04a9f),
347  SPH_C32(0xa87596a8), SPH_C32(0x51ac5f51), SPH_C32(0xa344baa3),
348  SPH_C32(0x40db1b40), SPH_C32(0x8f800a8f), SPH_C32(0x92d37e92),
349  SPH_C32(0x9dfe429d), SPH_C32(0x38a8e038), SPH_C32(0xf5fdf9f5),
350  SPH_C32(0xbc19c6bc), SPH_C32(0xb62feeb6), SPH_C32(0xda3045da),
351  SPH_C32(0x21e78421), SPH_C32(0x10704010), SPH_C32(0xffcbd1ff),
352  SPH_C32(0xf3efe1f3), SPH_C32(0xd20865d2), SPH_C32(0xcd5519cd),
353  SPH_C32(0x0c24300c), SPH_C32(0x13794c13), SPH_C32(0xecb29dec),
354  SPH_C32(0x5f86675f), SPH_C32(0x97c86a97), SPH_C32(0x44c70b44),
355  SPH_C32(0x17655c17), SPH_C32(0xc46a3dc4), SPH_C32(0xa758aaa7),
356  SPH_C32(0x7e61e37e), SPH_C32(0x3db3f43d), SPH_C32(0x64278b64),
357  SPH_C32(0x5d886f5d), SPH_C32(0x194f6419), SPH_C32(0x7342d773),
358  SPH_C32(0x603b9b60), SPH_C32(0x81aa3281), SPH_C32(0x4ff6274f),
359  SPH_C32(0xdc225ddc), SPH_C32(0x22ee8822), SPH_C32(0x2ad6a82a),
360  SPH_C32(0x90dd7690), SPH_C32(0x88951688), SPH_C32(0x46c90346),
361  SPH_C32(0xeebc95ee), SPH_C32(0xb805d6b8), SPH_C32(0x146c5014),
362  SPH_C32(0xde2c55de), SPH_C32(0x5e81635e), SPH_C32(0x0b312c0b),
363  SPH_C32(0xdb3741db), SPH_C32(0xe096ade0), SPH_C32(0x329ec832),
364  SPH_C32(0x3aa6e83a), SPH_C32(0x0a36280a), SPH_C32(0x49e43f49),
365  SPH_C32(0x06121806), SPH_C32(0x24fc9024), SPH_C32(0x5c8f6b5c),
366  SPH_C32(0xc27825c2), SPH_C32(0xd30f61d3), SPH_C32(0xac6986ac),
367  SPH_C32(0x62359362), SPH_C32(0x91da7291), SPH_C32(0x95c66295),
368  SPH_C32(0xe48abde4), SPH_C32(0x7974ff79), SPH_C32(0xe783b1e7),
369  SPH_C32(0xc84e0dc8), SPH_C32(0x3785dc37), SPH_C32(0x6d18af6d),
370  SPH_C32(0x8d8e028d), SPH_C32(0xd51d79d5), SPH_C32(0x4ef1234e),
371  SPH_C32(0xa97292a9), SPH_C32(0x6c1fab6c), SPH_C32(0x56b94356),
372  SPH_C32(0xf4fafdf4), SPH_C32(0xeaa085ea), SPH_C32(0x65208f65),
373  SPH_C32(0x7a7df37a), SPH_C32(0xae678eae), SPH_C32(0x08382008),
374  SPH_C32(0xba0bdeba), SPH_C32(0x7873fb78), SPH_C32(0x25fb9425),
375  SPH_C32(0x2ecab82e), SPH_C32(0x1c54701c), SPH_C32(0xa65faea6),
376  SPH_C32(0xb421e6b4), SPH_C32(0xc66435c6), SPH_C32(0xe8ae8de8),
377  SPH_C32(0xdd2559dd), SPH_C32(0x7457cb74), SPH_C32(0x1f5d7c1f),
378  SPH_C32(0x4bea374b), SPH_C32(0xbd1ec2bd), SPH_C32(0x8b9c1a8b),
379  SPH_C32(0x8a9b1e8a), SPH_C32(0x704bdb70), SPH_C32(0x3ebaf83e),
380  SPH_C32(0xb526e2b5), SPH_C32(0x66298366), SPH_C32(0x48e33b48),
381  SPH_C32(0x03090c03), SPH_C32(0xf6f4f5f6), SPH_C32(0x0e2a380e),
382  SPH_C32(0x613c9f61), SPH_C32(0x358bd435), SPH_C32(0x57be4757),
383  SPH_C32(0xb902d2b9), SPH_C32(0x86bf2e86), SPH_C32(0xc17129c1),
384  SPH_C32(0x1d53741d), SPH_C32(0x9ef74e9e), SPH_C32(0xe191a9e1),
385  SPH_C32(0xf8decdf8), SPH_C32(0x98e55698), SPH_C32(0x11774411),
386  SPH_C32(0x6904bf69), SPH_C32(0xd93949d9), SPH_C32(0x8e870e8e),
387  SPH_C32(0x94c16694), SPH_C32(0x9bec5a9b), SPH_C32(0x1e5a781e),
388  SPH_C32(0x87b82a87), SPH_C32(0xe9a989e9), SPH_C32(0xce5c15ce),
389  SPH_C32(0x55b04f55), SPH_C32(0x28d8a028), SPH_C32(0xdf2b51df),
390  SPH_C32(0x8c89068c), SPH_C32(0xa14ab2a1), SPH_C32(0x89921289),
391  SPH_C32(0x0d23340d), SPH_C32(0xbf10cabf), SPH_C32(0xe684b5e6),
392  SPH_C32(0x42d51342), SPH_C32(0x6803bb68), SPH_C32(0x41dc1f41),
393  SPH_C32(0x99e25299), SPH_C32(0x2dc3b42d), SPH_C32(0x0f2d3c0f),
394  SPH_C32(0xb03df6b0), SPH_C32(0x54b74b54), SPH_C32(0xbb0cdabb),
395  SPH_C32(0x16625816)
396 };
397 
398 #define TIX2(q, x00, x01, x08, x10, x24) do { \
399  x10 ^= x00; \
400  x00 = (q); \
401  x08 ^= x00; \
402  x01 ^= x24; \
403  } while (0)
404 
405 #define TIX3(q, x00, x01, x04, x08, x16, x27, x30) do { \
406  x16 ^= x00; \
407  x00 = (q); \
408  x08 ^= x00; \
409  x01 ^= x27; \
410  x04 ^= x30; \
411  } while (0)
412 
413 #define TIX4(q, x00, x01, x04, x07, x08, x22, x24, x27, x30) do { \
414  x22 ^= x00; \
415  x00 = (q); \
416  x08 ^= x00; \
417  x01 ^= x24; \
418  x04 ^= x27; \
419  x07 ^= x30; \
420  } while (0)
421 
422 #define CMIX30(x00, x01, x02, x04, x05, x06, x15, x16, x17) do { \
423  x00 ^= x04; \
424  x01 ^= x05; \
425  x02 ^= x06; \
426  x15 ^= x04; \
427  x16 ^= x05; \
428  x17 ^= x06; \
429  } while (0)
430 
431 #define CMIX36(x00, x01, x02, x04, x05, x06, x18, x19, x20) do { \
432  x00 ^= x04; \
433  x01 ^= x05; \
434  x02 ^= x06; \
435  x18 ^= x04; \
436  x19 ^= x05; \
437  x20 ^= x06; \
438  } while (0)
439 
440 #define SMIX(x0, x1, x2, x3) do { \
441  sph_u32 c0 = 0; \
442  sph_u32 c1 = 0; \
443  sph_u32 c2 = 0; \
444  sph_u32 c3 = 0; \
445  sph_u32 r0 = 0; \
446  sph_u32 r1 = 0; \
447  sph_u32 r2 = 0; \
448  sph_u32 r3 = 0; \
449  sph_u32 tmp; \
450  tmp = mixtab0[x0 >> 24]; \
451  c0 ^= tmp; \
452  tmp = mixtab1[(x0 >> 16) & 0xFF]; \
453  c0 ^= tmp; \
454  r1 ^= tmp; \
455  tmp = mixtab2[(x0 >> 8) & 0xFF]; \
456  c0 ^= tmp; \
457  r2 ^= tmp; \
458  tmp = mixtab3[x0 & 0xFF]; \
459  c0 ^= tmp; \
460  r3 ^= tmp; \
461  tmp = mixtab0[x1 >> 24]; \
462  c1 ^= tmp; \
463  r0 ^= tmp; \
464  tmp = mixtab1[(x1 >> 16) & 0xFF]; \
465  c1 ^= tmp; \
466  tmp = mixtab2[(x1 >> 8) & 0xFF]; \
467  c1 ^= tmp; \
468  r2 ^= tmp; \
469  tmp = mixtab3[x1 & 0xFF]; \
470  c1 ^= tmp; \
471  r3 ^= tmp; \
472  tmp = mixtab0[x2 >> 24]; \
473  c2 ^= tmp; \
474  r0 ^= tmp; \
475  tmp = mixtab1[(x2 >> 16) & 0xFF]; \
476  c2 ^= tmp; \
477  r1 ^= tmp; \
478  tmp = mixtab2[(x2 >> 8) & 0xFF]; \
479  c2 ^= tmp; \
480  tmp = mixtab3[x2 & 0xFF]; \
481  c2 ^= tmp; \
482  r3 ^= tmp; \
483  tmp = mixtab0[x3 >> 24]; \
484  c3 ^= tmp; \
485  r0 ^= tmp; \
486  tmp = mixtab1[(x3 >> 16) & 0xFF]; \
487  c3 ^= tmp; \
488  r1 ^= tmp; \
489  tmp = mixtab2[(x3 >> 8) & 0xFF]; \
490  c3 ^= tmp; \
491  r2 ^= tmp; \
492  tmp = mixtab3[x3 & 0xFF]; \
493  c3 ^= tmp; \
494  x0 = ((c0 ^ r0) & SPH_C32(0xFF000000)) \
495  | ((c1 ^ r1) & SPH_C32(0x00FF0000)) \
496  | ((c2 ^ r2) & SPH_C32(0x0000FF00)) \
497  | ((c3 ^ r3) & SPH_C32(0x000000FF)); \
498  x1 = ((c1 ^ (r0 << 8)) & SPH_C32(0xFF000000)) \
499  | ((c2 ^ (r1 << 8)) & SPH_C32(0x00FF0000)) \
500  | ((c3 ^ (r2 << 8)) & SPH_C32(0x0000FF00)) \
501  | ((c0 ^ (r3 >> 24)) & SPH_C32(0x000000FF)); \
502  x2 = ((c2 ^ (r0 << 16)) & SPH_C32(0xFF000000)) \
503  | ((c3 ^ (r1 << 16)) & SPH_C32(0x00FF0000)) \
504  | ((c0 ^ (r2 >> 16)) & SPH_C32(0x0000FF00)) \
505  | ((c1 ^ (r3 >> 16)) & SPH_C32(0x000000FF)); \
506  x3 = ((c3 ^ (r0 << 24)) & SPH_C32(0xFF000000)) \
507  | ((c0 ^ (r1 >> 8)) & SPH_C32(0x00FF0000)) \
508  | ((c1 ^ (r2 >> 8)) & SPH_C32(0x0000FF00)) \
509  | ((c2 ^ (r3 >> 8)) & SPH_C32(0x000000FF)); \
510  /* */ \
511  } while (0)
512 
513 #if SPH_FUGUE_NOCOPY
514 
515 #define DECL_STATE_SMALL
516 #define READ_STATE_SMALL(state)
517 #define WRITE_STATE_SMALL(state)
518 #define DECL_STATE_BIG
519 #define READ_STATE_BIG(state)
520 #define WRITE_STATE_BIG(state)
521 
522 #define S00 ((sc)->S[ 0])
523 #define S01 ((sc)->S[ 1])
524 #define S02 ((sc)->S[ 2])
525 #define S03 ((sc)->S[ 3])
526 #define S04 ((sc)->S[ 4])
527 #define S05 ((sc)->S[ 5])
528 #define S06 ((sc)->S[ 6])
529 #define S07 ((sc)->S[ 7])
530 #define S08 ((sc)->S[ 8])
531 #define S09 ((sc)->S[ 9])
532 #define S10 ((sc)->S[10])
533 #define S11 ((sc)->S[11])
534 #define S12 ((sc)->S[12])
535 #define S13 ((sc)->S[13])
536 #define S14 ((sc)->S[14])
537 #define S15 ((sc)->S[15])
538 #define S16 ((sc)->S[16])
539 #define S17 ((sc)->S[17])
540 #define S18 ((sc)->S[18])
541 #define S19 ((sc)->S[19])
542 #define S20 ((sc)->S[20])
543 #define S21 ((sc)->S[21])
544 #define S22 ((sc)->S[22])
545 #define S23 ((sc)->S[23])
546 #define S24 ((sc)->S[24])
547 #define S25 ((sc)->S[25])
548 #define S26 ((sc)->S[26])
549 #define S27 ((sc)->S[27])
550 #define S28 ((sc)->S[28])
551 #define S29 ((sc)->S[29])
552 #define S30 ((sc)->S[30])
553 #define S31 ((sc)->S[31])
554 #define S32 ((sc)->S[32])
555 #define S33 ((sc)->S[33])
556 #define S34 ((sc)->S[34])
557 #define S35 ((sc)->S[35])
558 
559 #else
560 
561 #define DECL_STATE_SMALL \
562  sph_u32 S00, S01, S02, S03, S04, S05, S06, S07, S08, S09; \
563  sph_u32 S10, S11, S12, S13, S14, S15, S16, S17, S18, S19; \
564  sph_u32 S20, S21, S22, S23, S24, S25, S26, S27, S28, S29;
565 
566 #define DECL_STATE_BIG \
567  DECL_STATE_SMALL \
568  sph_u32 S30, S31, S32, S33, S34, S35;
569 
570 #define READ_STATE_SMALL(state) do { \
571  S00 = (state)->S[ 0]; \
572  S01 = (state)->S[ 1]; \
573  S02 = (state)->S[ 2]; \
574  S03 = (state)->S[ 3]; \
575  S04 = (state)->S[ 4]; \
576  S05 = (state)->S[ 5]; \
577  S06 = (state)->S[ 6]; \
578  S07 = (state)->S[ 7]; \
579  S08 = (state)->S[ 8]; \
580  S09 = (state)->S[ 9]; \
581  S10 = (state)->S[10]; \
582  S11 = (state)->S[11]; \
583  S12 = (state)->S[12]; \
584  S13 = (state)->S[13]; \
585  S14 = (state)->S[14]; \
586  S15 = (state)->S[15]; \
587  S16 = (state)->S[16]; \
588  S17 = (state)->S[17]; \
589  S18 = (state)->S[18]; \
590  S19 = (state)->S[19]; \
591  S20 = (state)->S[20]; \
592  S21 = (state)->S[21]; \
593  S22 = (state)->S[22]; \
594  S23 = (state)->S[23]; \
595  S24 = (state)->S[24]; \
596  S25 = (state)->S[25]; \
597  S26 = (state)->S[26]; \
598  S27 = (state)->S[27]; \
599  S28 = (state)->S[28]; \
600  S29 = (state)->S[29]; \
601  } while (0)
602 
603 #define READ_STATE_BIG(state) do { \
604  READ_STATE_SMALL(state); \
605  S30 = (state)->S[30]; \
606  S31 = (state)->S[31]; \
607  S32 = (state)->S[32]; \
608  S33 = (state)->S[33]; \
609  S34 = (state)->S[34]; \
610  S35 = (state)->S[35]; \
611  } while (0)
612 
613 #define WRITE_STATE_SMALL(state) do { \
614  (state)->S[ 0] = S00; \
615  (state)->S[ 1] = S01; \
616  (state)->S[ 2] = S02; \
617  (state)->S[ 3] = S03; \
618  (state)->S[ 4] = S04; \
619  (state)->S[ 5] = S05; \
620  (state)->S[ 6] = S06; \
621  (state)->S[ 7] = S07; \
622  (state)->S[ 8] = S08; \
623  (state)->S[ 9] = S09; \
624  (state)->S[10] = S10; \
625  (state)->S[11] = S11; \
626  (state)->S[12] = S12; \
627  (state)->S[13] = S13; \
628  (state)->S[14] = S14; \
629  (state)->S[15] = S15; \
630  (state)->S[16] = S16; \
631  (state)->S[17] = S17; \
632  (state)->S[18] = S18; \
633  (state)->S[19] = S19; \
634  (state)->S[20] = S20; \
635  (state)->S[21] = S21; \
636  (state)->S[22] = S22; \
637  (state)->S[23] = S23; \
638  (state)->S[24] = S24; \
639  (state)->S[25] = S25; \
640  (state)->S[26] = S26; \
641  (state)->S[27] = S27; \
642  (state)->S[28] = S28; \
643  (state)->S[29] = S29; \
644  } while (0)
645 
646 #define WRITE_STATE_BIG(state) do { \
647  WRITE_STATE_SMALL(state); \
648  (state)->S[30] = S30; \
649  (state)->S[31] = S31; \
650  (state)->S[32] = S32; \
651  (state)->S[33] = S33; \
652  (state)->S[34] = S34; \
653  (state)->S[35] = S35; \
654  } while (0)
655 
656 #endif
657 
658 static void
659 fugue_init(sph_fugue_context *sc, size_t z_len,
660  const sph_u32 *iv, size_t iv_len)
661 {
662  size_t u;
663 
664  for (u = 0; u < z_len; u ++)
665  sc->S[u] = 0;
666  memcpy(&sc->S[z_len], iv, iv_len * sizeof *iv);
667  sc->partial = 0;
668  sc->partial_len = 0;
669  sc->round_shift = 0;
670 #if SPH_64
671  sc->bit_count = 0;
672 #else
673  sc->bit_count_high = 0;
674  sc->bit_count_low = 0;
675 #endif
676 }
677 
678 #if SPH_64
679 
680 #define INCR_COUNTER do { \
681  sc->bit_count += (sph_u64)len << 3; \
682  } while (0)
683 
684 #else
685 
686 #define INCR_COUNTER do { \
687  sph_u32 tmp = SPH_T32((sph_u32)len << 3); \
688  sc->bit_count_low = SPH_T32(sc->bit_count_low + tmp); \
689  if (sc->bit_count_low < tmp) \
690  sc->bit_count_high ++; \
691  sc->bit_count_high = SPH_T32(sc->bit_count_high \
692  + ((sph_u32)len >> 29)); \
693  } while (0)
694 
695 #endif
696 
697 #define CORE_ENTRY \
698  sph_u32 p; \
699  unsigned plen, rshift; \
700  INCR_COUNTER; \
701  p = sc->partial; \
702  plen = sc->partial_len; \
703  if (plen < 4) { \
704  unsigned count = 4 - plen; \
705  if (len < count) \
706  count = len; \
707  plen += count; \
708  while (count -- > 0) { \
709  p = (p << 8) | *(const unsigned char *)data; \
710  data = (const unsigned char *)data + 1; \
711  len --; \
712  } \
713  if (len == 0) { \
714  sc->partial = p; \
715  sc->partial_len = plen; \
716  return; \
717  } \
718  }
719 
720 #define CORE_EXIT \
721  p = 0; \
722  sc->partial_len = (unsigned)len; \
723  while (len -- > 0) { \
724  p = (p << 8) | *(const unsigned char *)data; \
725  data = (const unsigned char *)data + 1; \
726  } \
727  sc->partial = p; \
728  sc->round_shift = rshift;
729 
730 /*
731  * Not in a do..while: the 'break' must exit the outer loop.
732  */
733 #define NEXT(rc) \
734  if (len <= 4) { \
735  rshift = (rc); \
736  break; \
737  } \
738  p = sph_dec32be(data); \
739  data = (const unsigned char *)data + 4; \
740  len -= 4
741 
742 static void
743 fugue2_core(sph_fugue_context *sc, const void *data, size_t len)
744 {
746  CORE_ENTRY
747  READ_STATE_SMALL(sc);
748  rshift = sc->round_shift;
749  switch (rshift) {
750  for (;;) {
751  sph_u32 q;
752 
753  case 0:
754  q = p;
755  TIX2(q, S00, S01, S08, S10, S24);
756  CMIX30(S27, S28, S29, S01, S02, S03, S12, S13, S14);
757  SMIX(S27, S28, S29, S00);
758  CMIX30(S24, S25, S26, S28, S29, S00, S09, S10, S11);
759  SMIX(S24, S25, S26, S27);
760  NEXT(1);
761  /* fall through */
762  case 1:
763  q = p;
764  TIX2(q, S24, S25, S02, S04, S18);
765  CMIX30(S21, S22, S23, S25, S26, S27, S06, S07, S08);
766  SMIX(S21, S22, S23, S24);
767  CMIX30(S18, S19, S20, S22, S23, S24, S03, S04, S05);
768  SMIX(S18, S19, S20, S21);
769  NEXT(2);
770  /* fall through */
771  case 2:
772  q = p;
773  TIX2(q, S18, S19, S26, S28, S12);
774  CMIX30(S15, S16, S17, S19, S20, S21, S00, S01, S02);
775  SMIX(S15, S16, S17, S18);
776  CMIX30(S12, S13, S14, S16, S17, S18, S27, S28, S29);
777  SMIX(S12, S13, S14, S15);
778  NEXT(3);
779  /* fall through */
780  case 3:
781  q = p;
782  TIX2(q, S12, S13, S20, S22, S06);
783  CMIX30(S09, S10, S11, S13, S14, S15, S24, S25, S26);
784  SMIX(S09, S10, S11, S12);
785  CMIX30(S06, S07, S08, S10, S11, S12, S21, S22, S23);
786  SMIX(S06, S07, S08, S09);
787  NEXT(4);
788  /* fall through */
789  case 4:
790  q = p;
791  TIX2(q, S06, S07, S14, S16, S00);
792  CMIX30(S03, S04, S05, S07, S08, S09, S18, S19, S20);
793  SMIX(S03, S04, S05, S06);
794  CMIX30(S00, S01, S02, S04, S05, S06, S15, S16, S17);
795  SMIX(S00, S01, S02, S03);
796  NEXT(0);
797  }
798  }
799  CORE_EXIT
800  WRITE_STATE_SMALL(sc);
801 }
802 
803 static void
804 fugue3_core(sph_fugue_context *sc, const void *data, size_t len)
805 {
807  CORE_ENTRY
808  READ_STATE_BIG(sc);
809  rshift = sc->round_shift;
810  switch (rshift) {
811  for (;;) {
812  sph_u32 q;
813 
814  case 0:
815  q = p;
816  TIX3(q, S00, S01, S04, S08, S16, S27, S30);
817  CMIX36(S33, S34, S35, S01, S02, S03, S15, S16, S17);
818  SMIX(S33, S34, S35, S00);
819  CMIX36(S30, S31, S32, S34, S35, S00, S12, S13, S14);
820  SMIX(S30, S31, S32, S33);
821  CMIX36(S27, S28, S29, S31, S32, S33, S09, S10, S11);
822  SMIX(S27, S28, S29, S30);
823  NEXT(1);
824  /* fall through */
825  case 1:
826  q = p;
827  TIX3(q, S27, S28, S31, S35, S07, S18, S21);
828  CMIX36(S24, S25, S26, S28, S29, S30, S06, S07, S08);
829  SMIX(S24, S25, S26, S27);
830  CMIX36(S21, S22, S23, S25, S26, S27, S03, S04, S05);
831  SMIX(S21, S22, S23, S24);
832  CMIX36(S18, S19, S20, S22, S23, S24, S00, S01, S02);
833  SMIX(S18, S19, S20, S21);
834  NEXT(2);
835  /* fall through */
836  case 2:
837  q = p;
838  TIX3(q, S18, S19, S22, S26, S34, S09, S12);
839  CMIX36(S15, S16, S17, S19, S20, S21, S33, S34, S35);
840  SMIX(S15, S16, S17, S18);
841  CMIX36(S12, S13, S14, S16, S17, S18, S30, S31, S32);
842  SMIX(S12, S13, S14, S15);
843  CMIX36(S09, S10, S11, S13, S14, S15, S27, S28, S29);
844  SMIX(S09, S10, S11, S12);
845  NEXT(3);
846  /* fall through */
847  case 3:
848  q = p;
849  TIX3(q, S09, S10, S13, S17, S25, S00, S03);
850  CMIX36(S06, S07, S08, S10, S11, S12, S24, S25, S26);
851  SMIX(S06, S07, S08, S09);
852  CMIX36(S03, S04, S05, S07, S08, S09, S21, S22, S23);
853  SMIX(S03, S04, S05, S06);
854  CMIX36(S00, S01, S02, S04, S05, S06, S18, S19, S20);
855  SMIX(S00, S01, S02, S03);
856  NEXT(0);
857  }
858  }
859  CORE_EXIT
860  WRITE_STATE_BIG(sc);
861 }
862 
863 static void
864 fugue4_core(sph_fugue_context *sc, const void *data, size_t len)
865 {
867  CORE_ENTRY
868  READ_STATE_BIG(sc);
869  rshift = sc->round_shift;
870  switch (rshift) {
871  for (;;) {
872  sph_u32 q;
873 
874  case 0:
875  q = p;
876  TIX4(q, S00, S01, S04, S07, S08, S22, S24, S27, S30);
877  CMIX36(S33, S34, S35, S01, S02, S03, S15, S16, S17);
878  SMIX(S33, S34, S35, S00);
879  CMIX36(S30, S31, S32, S34, S35, S00, S12, S13, S14);
880  SMIX(S30, S31, S32, S33);
881  CMIX36(S27, S28, S29, S31, S32, S33, S09, S10, S11);
882  SMIX(S27, S28, S29, S30);
883  CMIX36(S24, S25, S26, S28, S29, S30, S06, S07, S08);
884  SMIX(S24, S25, S26, S27);
885  NEXT(1);
886  /* fall through */
887  case 1:
888  q = p;
889  TIX4(q, S24, S25, S28, S31, S32, S10, S12, S15, S18);
890  CMIX36(S21, S22, S23, S25, S26, S27, S03, S04, S05);
891  SMIX(S21, S22, S23, S24);
892  CMIX36(S18, S19, S20, S22, S23, S24, S00, S01, S02);
893  SMIX(S18, S19, S20, S21);
894  CMIX36(S15, S16, S17, S19, S20, S21, S33, S34, S35);
895  SMIX(S15, S16, S17, S18);
896  CMIX36(S12, S13, S14, S16, S17, S18, S30, S31, S32);
897  SMIX(S12, S13, S14, S15);
898  NEXT(2);
899  /* fall through */
900  case 2:
901  q = p;
902  TIX4(q, S12, S13, S16, S19, S20, S34, S00, S03, S06);
903  CMIX36(S09, S10, S11, S13, S14, S15, S27, S28, S29);
904  SMIX(S09, S10, S11, S12);
905  CMIX36(S06, S07, S08, S10, S11, S12, S24, S25, S26);
906  SMIX(S06, S07, S08, S09);
907  CMIX36(S03, S04, S05, S07, S08, S09, S21, S22, S23);
908  SMIX(S03, S04, S05, S06);
909  CMIX36(S00, S01, S02, S04, S05, S06, S18, S19, S20);
910  SMIX(S00, S01, S02, S03);
911  NEXT(0);
912  }
913  }
914  CORE_EXIT
915  WRITE_STATE_BIG(sc);
916 }
917 
918 #if SPH_64
919 
920 #define WRITE_COUNTER do { \
921  sph_enc64be(buf + 4, sc->bit_count + n); \
922  } while (0)
923 
924 #else
925 
926 #define WRITE_COUNTER do { \
927  sph_enc32be(buf + 4, sc->bit_count_high); \
928  sph_enc32be(buf + 8, sc->bit_count_low + n); \
929  } while (0)
930 
931 #endif
932 
933 #define CLOSE_ENTRY(s, rcm, core) \
934  unsigned char buf[16]; \
935  unsigned plen, rms; \
936  unsigned char *out; \
937  sph_u32 S[s]; \
938  plen = sc->partial_len; \
939  WRITE_COUNTER; \
940  if (plen == 0 && n == 0) { \
941  plen = 4; \
942  } else if (plen < 4 || n != 0) { \
943  unsigned u; \
944  \
945  if (plen == 4) \
946  plen = 0; \
947  buf[plen] = ub & ~(0xFFU >> n); \
948  for (u = plen + 1; u < 4; u ++) \
949  buf[u] = 0; \
950  } \
951  core(sc, buf + plen, (sizeof buf) - plen); \
952  rms = sc->round_shift * (rcm); \
953  memcpy(S, sc->S + (s) - rms, rms * sizeof(sph_u32)); \
954  memcpy(S + rms, sc->S, ((s) - rms) * sizeof(sph_u32));
955 
956 #define ROR(n, s) do { \
957  sph_u32 tmp[n]; \
958  memcpy(tmp, S + ((s) - (n)), (n) * sizeof(sph_u32)); \
959  memmove(S + (n), S, ((s) - (n)) * sizeof(sph_u32)); \
960  memcpy(S, tmp, (n) * sizeof(sph_u32)); \
961  } while (0)
962 
963 static void
964 fugue2_close(sph_fugue_context *sc, unsigned ub, unsigned n,
965  void *dst, size_t out_size_w32)
966 {
967  int i;
968 
969  CLOSE_ENTRY(30, 6, fugue2_core)
970  for (i = 0; i < 10; i ++) {
971  ROR(3, 30);
972  CMIX30(S[0], S[1], S[2], S[4], S[5], S[6], S[15], S[16], S[17]);
973  SMIX(S[0], S[1], S[2], S[3]);
974  }
975  for (i = 0; i < 13; i ++) {
976  S[4] ^= S[0];
977  S[15] ^= S[0];
978  ROR(15, 30);
979  SMIX(S[0], S[1], S[2], S[3]);
980  S[4] ^= S[0];
981  S[16] ^= S[0];
982  ROR(14, 30);
983  SMIX(S[0], S[1], S[2], S[3]);
984  }
985  S[4] ^= S[0];
986  S[15] ^= S[0];
987  out = dst;
988  sph_enc32be(out + 0, S[ 1]);
989  sph_enc32be(out + 4, S[ 2]);
990  sph_enc32be(out + 8, S[ 3]);
991  sph_enc32be(out + 12, S[ 4]);
992  sph_enc32be(out + 16, S[15]);
993  sph_enc32be(out + 20, S[16]);
994  sph_enc32be(out + 24, S[17]);
995  if (out_size_w32 == 8) {
996  sph_enc32be(out + 28, S[18]);
997  sph_fugue256_init(sc);
998  } else {
999  sph_fugue224_init(sc);
1000  }
1001 }
1002 
1003 static void
1004 fugue3_close(sph_fugue_context *sc, unsigned ub, unsigned n, void *dst)
1005 {
1006  int i;
1007 
1008  CLOSE_ENTRY(36, 9, fugue3_core)
1009  for (i = 0; i < 18; i ++) {
1010  ROR(3, 36);
1011  CMIX36(S[0], S[1], S[2], S[4], S[5], S[6], S[18], S[19], S[20]);
1012  SMIX(S[0], S[1], S[2], S[3]);
1013  }
1014  for (i = 0; i < 13; i ++) {
1015  S[4] ^= S[0];
1016  S[12] ^= S[0];
1017  S[24] ^= S[0];
1018  ROR(12, 36);
1019  SMIX(S[0], S[1], S[2], S[3]);
1020  S[4] ^= S[0];
1021  S[13] ^= S[0];
1022  S[24] ^= S[0];
1023  ROR(12, 36);
1024  SMIX(S[0], S[1], S[2], S[3]);
1025  S[4] ^= S[0];
1026  S[13] ^= S[0];
1027  S[25] ^= S[0];
1028  ROR(11, 36);
1029  SMIX(S[0], S[1], S[2], S[3]);
1030  }
1031  S[4] ^= S[0];
1032  S[12] ^= S[0];
1033  S[24] ^= S[0];
1034  out = dst;
1035  sph_enc32be(out + 0, S[ 1]);
1036  sph_enc32be(out + 4, S[ 2]);
1037  sph_enc32be(out + 8, S[ 3]);
1038  sph_enc32be(out + 12, S[ 4]);
1039  sph_enc32be(out + 16, S[12]);
1040  sph_enc32be(out + 20, S[13]);
1041  sph_enc32be(out + 24, S[14]);
1042  sph_enc32be(out + 28, S[15]);
1043  sph_enc32be(out + 32, S[24]);
1044  sph_enc32be(out + 36, S[25]);
1045  sph_enc32be(out + 40, S[26]);
1046  sph_enc32be(out + 44, S[27]);
1047  sph_fugue384_init(sc);
1048 }
1049 
1050 static void
1051 fugue4_close(sph_fugue_context *sc, unsigned ub, unsigned n, void *dst)
1052 {
1053  int i;
1054 
1055  CLOSE_ENTRY(36, 12, fugue4_core)
1056  for (i = 0; i < 32; i ++) {
1057  ROR(3, 36);
1058  CMIX36(S[0], S[1], S[2], S[4], S[5], S[6], S[18], S[19], S[20]);
1059  SMIX(S[0], S[1], S[2], S[3]);
1060  }
1061  for (i = 0; i < 13; i ++) {
1062  S[4] ^= S[0];
1063  S[9] ^= S[0];
1064  S[18] ^= S[0];
1065  S[27] ^= S[0];
1066  ROR(9, 36);
1067  SMIX(S[0], S[1], S[2], S[3]);
1068  S[4] ^= S[0];
1069  S[10] ^= S[0];
1070  S[18] ^= S[0];
1071  S[27] ^= S[0];
1072  ROR(9, 36);
1073  SMIX(S[0], S[1], S[2], S[3]);
1074  S[4] ^= S[0];
1075  S[10] ^= S[0];
1076  S[19] ^= S[0];
1077  S[27] ^= S[0];
1078  ROR(9, 36);
1079  SMIX(S[0], S[1], S[2], S[3]);
1080  S[4] ^= S[0];
1081  S[10] ^= S[0];
1082  S[19] ^= S[0];
1083  S[28] ^= S[0];
1084  ROR(8, 36);
1085  SMIX(S[0], S[1], S[2], S[3]);
1086  }
1087  S[4] ^= S[0];
1088  S[9] ^= S[0];
1089  S[18] ^= S[0];
1090  S[27] ^= S[0];
1091  out = dst;
1092  sph_enc32be(out + 0, S[ 1]);
1093  sph_enc32be(out + 4, S[ 2]);
1094  sph_enc32be(out + 8, S[ 3]);
1095  sph_enc32be(out + 12, S[ 4]);
1096  sph_enc32be(out + 16, S[ 9]);
1097  sph_enc32be(out + 20, S[10]);
1098  sph_enc32be(out + 24, S[11]);
1099  sph_enc32be(out + 28, S[12]);
1100  sph_enc32be(out + 32, S[18]);
1101  sph_enc32be(out + 36, S[19]);
1102  sph_enc32be(out + 40, S[20]);
1103  sph_enc32be(out + 44, S[21]);
1104  sph_enc32be(out + 48, S[27]);
1105  sph_enc32be(out + 52, S[28]);
1106  sph_enc32be(out + 56, S[29]);
1107  sph_enc32be(out + 60, S[30]);
1108 // sph_fugue512_init(sc);
1109 }
1110 
1111 void
1113 {
1114  fugue_init(cc, 23, IV224, 7);
1115 }
1116 
1117 void
1118 sph_fugue224(void *cc, const void *data, size_t len)
1119 {
1120  fugue2_core(cc, data, len);
1121 }
1122 
1123 void
1124 sph_fugue224_close(void *cc, void *dst)
1125 {
1126  fugue2_close(cc, 0, 0, dst, 7);
1127 }
1128 
1129 void
1130 sph_fugue224_addbits_and_close(void *cc, unsigned ub, unsigned n, void *dst)
1131 {
1132  fugue2_close(cc, ub, n, dst, 7);
1133 }
1134 
1135 void
1137 {
1138  fugue_init(cc, 22, IV256, 8);
1139 }
1140 
1141 void
1142 sph_fugue256(void *cc, const void *data, size_t len)
1143 {
1144  fugue2_core(cc, data, len);
1145 }
1146 
1147 void
1148 sph_fugue256_close(void *cc, void *dst)
1149 {
1150  fugue2_close(cc, 0, 0, dst, 8);
1151 }
1152 
1153 void
1154 sph_fugue256_addbits_and_close(void *cc, unsigned ub, unsigned n, void *dst)
1155 {
1156  fugue2_close(cc, ub, n, dst, 8);
1157 }
1158 
1159 void
1161 {
1162  fugue_init(cc, 24, IV384, 12);
1163 }
1164 
1165 void
1166 sph_fugue384(void *cc, const void *data, size_t len)
1167 {
1168  fugue3_core(cc, data, len);
1169 }
1170 
1171 void
1172 sph_fugue384_close(void *cc, void *dst)
1173 {
1174  fugue3_close(cc, 0, 0, dst);
1175 }
1176 
1177 void
1178 sph_fugue384_addbits_and_close(void *cc, unsigned ub, unsigned n, void *dst)
1179 {
1180  fugue3_close(cc, ub, n, dst);
1181 }
1182 
1183 void
1185 {
1186  fugue_init(cc, 20, IV512, 16);
1187 }
1188 
1189 void
1190 sph_fugue512(void *cc, const void *data, size_t len)
1191 {
1192  fugue4_core(cc, data, len);
1193 }
1194 
1195 void
1196 sph_fugue512_close(void *cc, void *dst)
1197 {
1198  fugue4_close(cc, 0, 0, dst);
1199 }
1200 
1201 void
1202 sph_fugue512_addbits_and_close(void *cc, unsigned ub, unsigned n, void *dst)
1203 {
1204  fugue4_close(cc, ub, n, dst);
1205 }
1206 #ifdef __cplusplus
1207 }
1208 #endif
sph_u32 bit_count_high
Definition: sph_fugue.h:28
void sph_fugue224(void *cc, const void *data, size_t len)
Definition: sph_fugue.c:1118
void sph_fugue512_addbits_and_close(void *cc, unsigned ub, unsigned n, void *dst)
Definition: sph_fugue.c:1202
#define CMIX36(x00, x01, x02, x04, x05, x06, x18, x19, x20)
Definition: sph_fugue.c:431
void sph_fugue512(void *cc, const void *data, size_t len)
Definition: sph_fugue.c:1190
void sph_fugue256_init(void *cc)
Definition: sph_fugue.c:1136
void sph_fugue224_addbits_and_close(void *cc, unsigned ub, unsigned n, void *dst)
Definition: sph_fugue.c:1130
void sph_fugue384_close(void *cc, void *dst)
Definition: sph_fugue.c:1172
#define CORE_EXIT
Definition: sph_fugue.c:720
#define CMIX30(x00, x01, x02, x04, x05, x06, x15, x16, x17)
Definition: sph_fugue.c:422
void sph_fugue256(void *cc, const void *data, size_t len)
Definition: sph_fugue.c:1142
#define DECL_STATE_BIG
Definition: sph_fugue.c:566
void sph_fugue256_close(void *cc, void *dst)
Definition: sph_fugue.c:1148
void sph_fugue224_close(void *cc, void *dst)
Definition: sph_fugue.c:1124
unsigned round_shift
Definition: sph_fugue.h:23
#define SPH_C32(x)
Definition: sph_types.h:873
void sph_fugue384(void *cc, const void *data, size_t len)
Definition: sph_fugue.c:1166
#define WRITE_STATE_SMALL(state)
Definition: sph_fugue.c:613
#define TIX2(q, x00, x01, x08, x10, x24)
Definition: sph_fugue.c:398
#define ROR(n, s)
Definition: sph_fugue.c:956
void sph_fugue384_init(void *cc)
Definition: sph_fugue.c:1160
#define TIX3(q, x00, x01, x04, x08, x16, x27, x30)
Definition: sph_fugue.c:405
#define S(x0, x1, x2, x3, cb, r)
Definition: jh.c:494
#define WRITE_STATE_BIG(state)
Definition: sph_fugue.c:646
#define CORE_ENTRY
Definition: sph_fugue.c:697
unsigned partial_len
Definition: sph_fugue.h:22
sph_u32 bit_count_low
Definition: sph_fugue.h:28
#define CLOSE_ENTRY(s, rcm, core)
Definition: sph_fugue.c:933
void sph_fugue384_addbits_and_close(void *cc, unsigned ub, unsigned n, void *dst)
Definition: sph_fugue.c:1178
sph_u32 S[36]
Definition: sph_fugue.h:24
#define READ_STATE_SMALL(state)
Definition: sph_fugue.c:570
void sph_fugue256_addbits_and_close(void *cc, unsigned ub, unsigned n, void *dst)
Definition: sph_fugue.c:1154
#define DECL_STATE_SMALL
Definition: sph_fugue.c:561
#define TIX4(q, x00, x01, x04, x07, x08, x22, x24, x27, x30)
Definition: sph_fugue.c:413
void * memcpy(void *a, const void *b, size_t c)
void sph_fugue512_close(void *cc, void *dst)
Definition: sph_fugue.c:1196
unsigned long sph_u32
Definition: sph_types.h:870
#define SMIX(x0, x1, x2, x3)
Definition: sph_fugue.c:440
#define NEXT(rc)
Definition: sph_fugue.c:733
sph_u32 partial
Definition: sph_fugue.h:21
#define READ_STATE_BIG(state)
Definition: sph_fugue.c:603
void sph_fugue224_init(void *cc)
Definition: sph_fugue.c:1112
void sph_fugue512_init(void *cc)
Definition: sph_fugue.c:1184